On 07/14/2015 06:37 AM, Oleg Nesterov wrote:
> On 07/14, Jan Kara wrote:
>> So unless
>> I'm missing something and there is a significant performance advantage to
>> Dave's patches I'm all for using a generic primitive you suggest.
>
> I think percpu_rw_semaphore looks a bit better. And even a bit faster.
> And it will not block __sb_start_write() entirely while freeze_super()
> sleeps in synchronize_rcu().
That's true, but freeze_super() and the code blocked by it is a
super-rare path compared with write().
> freeze_super() should be faster too after rcu_sync changes, but this
> is not that important.
>
> But again, to me the main advantage is that we can use the generic
> primitives and remove this nontrivial code in fs/super.c.
>
>> Can you perhaps work with Dave on some common resolution?
>
> Dave, what do you think? Will you agree with percpu_rw_semaphore ?
Using my little write-1-byte test (under will-it-scale), your 4 patches
improves the number of writes/sec by 12%. My 3 patches improve the
number of writes/sec by 32%.
My patches manage to get rid of the memory barriers entirely in the fast
path. Your approach keeps the barriers.
Test: https://www.sr71.net/~dave/intel/write1byte.c
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> On 07/14, Jan Kara wrote:
>> So unless
>> I'm missing something and there is a significant performance advantage to
>> Dave's patches I'm all for using a generic primitive you suggest.
>
> I think percpu_rw_semaphore looks a bit better. And even a bit faster.
> And it will not block __sb_start_write() entirely while freeze_super()
> sleeps in synchronize_rcu().
That's true, but freeze_super() and the code blocked by it is a
super-rare path compared with write().
> freeze_super() should be faster too after rcu_sync changes, but this
> is not that important.
>
> But again, to me the main advantage is that we can use the generic
> primitives and remove this nontrivial code in fs/super.c.
>
>> Can you perhaps work with Dave on some common resolution?
>
> Dave, what do you think? Will you agree with percpu_rw_semaphore ?
Using my little write-1-byte test (under will-it-scale), your 4 patches
improves the number of writes/sec by 12%. My 3 patches improve the
number of writes/sec by 32%.
My patches manage to get rid of the memory barriers entirely in the fast
path. Your approach keeps the barriers.
Test: https://www.sr71.net/~dave/intel/write1byte.c
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Please read the FAQ at http://www.tux.org/lkml/